TFT-LCDs are widely used in the field of flat panel displays for being light, thin and small, as well as having low power consumption, radiation-free emission and low usage cost. The TFT-LCDs are very suitable for desktop computers, palmtop computers, personal digital assistants (PDAs), portable telephones, televisions and various Office Automation and audiovisual devices. A liquid crystal display panel is the main part of the TFT-LCD, and generally comprises a TFT array substrate (also known as an array substrate), a color filter substrate and a liquid crystal layer sandwiched between the TFT array substrate and the color filter substrate.
A conventional array substrate in a TFT-LCD generally comprises a plurality of data lines and a plurality of scan lines, the data lines and the scan lines being arranged to perpendicularly intersect one another to define a plurality of pixel regions. Each of the pixel regions is provided with a pixel electrode therein, and a common electrode is provided in a layer underneath a layer in which the pixel electrodes are provided. A storage capacitor is formed by the pixel electrode and the common electrode being overlapped with an insulating layer disposed therebetween. TFTs are formed near the positions of intersection of the data lines and scan lines, and each comprises a gate electrode, a semiconductor layer, a source electrode and a drain electrode. Typically, the gate electrode is electrically connected with the scan line, the source electrode is electrically connected with the data line, and the drain electrode is electrically connected with the pixel electrode. In a TFT-LCD array substrate, the storage capacitor is for maintaining a potential of the pixel electrode after ending of a pixel scan signal, and increasing the capacitance of the pixel capacitor uniformly can effectively improve the uniformity of picture.
FIG. 1 is a cross section schematically showing a structure of a conventional array substrate 100. The array substrate 100 comprises a base 101′, a gate electrode 102′ and a common electrode 109 on the base 101′, a gate insulating layer 103′ above the gate electrode 102′ and the common electrode 109, a semiconductor layer 104 on the gate insulating layer 103′, a source electrode 105′ and a drain electrode 106′ of a TFT on the semiconductor layer 104 and the gate insulating layer 103′, a passivation layer 107′ on the gate insulating layer 103′, the source electrode 105′ and the drain electrode 106′, and a pixel electrode 108 on the passivation layer 107′.
FIG. 2 is a flow chart illustrating a conventional method of manufacturing the array substrate 100. The method employs five mask processes, and principally comprises the following five steps:
a. forming the gate electrode and the common electrode;
b. forming the gate insulating layer and the semiconductor layer;
c. forming a metal layer for the source/drain electrode and forming a TFT channel;
d. forming the passivation layer; and
e. forming the pixel electrode.
FIG. 3 is a plan view illustrating a pattern of the metal layer after the first mask process of the manufacturing method shown in FIG. 2. A storage capacitor is formed between the formed common electrode 109 (see FIG. 1) and the pixel electrode 108 (see FIG. 1) formed in the later fifth mask process to maintain a potential of the pixel electrode after end of a pixel scan signal.
In a conventional array substrate as shown in FIG. 3, the common electrodes are typically formed in matrix form. As a result, adverse effects, such as crosstalk, and adverse viewing effects, such as flickers and appearance of horizontal white-lines that are introduced due to difference in electrode signals, can be avoided. Although the common electrode in matrix form improves uniformity of signal, the aperture ratio of pixel is reduced because the common electrode 109 is an opaque metal layer.